Development of Large-Array Spatial Light Modulators

Steven Serati, Kipp Bauchert, Peter Millett

Published in SPIE Proceedings Volume 5362, Advanced Optical and Quantum Memories and Computing; (2004)


Newer silicon foundry processes make possible high-resolution backplanes (i.e. larger arrays with more line pairs per millimeter). Higher resolution is a benefit of the small geometry processes being developed for the electronics industry. Unfortunately, the trend is to shrink the circuits and decrease the operating voltage of the chip. For liquid crystal on silicon (LCoS) devices, the loss in voltage has a negative impact on performance. Higher voltage provides the excitation to achieve good response time with sufficient modulation depth from liquid crystal electro-optic modulators. This paper discusses the development of large array devices using the smaller geometry processes and some of the techniques used to retain good performance from the liquid crystal modulators.

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